Turbo码编译码算法研究
毕业论文关键词 Turbo码 Matlab Verilog SOVA
Title Study on Turbo-Code Encoding and Decoding Algorithm
Abstract Firstly, surrounding the Turbo-code, this paper gives a brief introduction of digital communication system, channel coding theory and the research status of Turbo-code. After proposing the paper background, this paper introduces Turbo-code theoretical knowledge and deduces MAP class and SOVA algorithm in detail. The main work of this paper is to design and simulate the Turbo-code encoder and decoder by Matlab and analyze its performance, and the hardware implementation on FPGA chip using Verilog. In the simulation, this paper analyses the component code, the frame length, the code rata, the number of iteration and the decoding algorithm of Turbo-code and gives a way to choose the best Turbo-code in different occasion. In hardware implementation, this paper gives the implementation scheme of encoder in detail and chose SOVA decoding algorithm to design decoder after comparing the implementation complexity of MAP and SOVA. In designing decoder, this paper gives the key module designs of the SOVA decoder which include Euclidean distance, the surviving path and soft output information.
Keywords Turbo Matlab Verilog SOVA
目次
1绪论1
1.1数字通信系统1
1.1.1信源和输入变化器1
1.1.2信源编码器和信源译码器1
1.1.3信道编码器和信道译码器1
1.1.4数字调制器和数字解调器2
1.1.5信道2
1.1.6信宿和输出变换器2
1.2信道编码理论2
1.3Turbo码研究现状3
1.3.1Turbo码的理论和设计3
1.3.2Turbo码的译码算法4
1.3.3Turbo码的应用4
1.4论文研究的背景5
1.5论文各章节安排5
2Turbo码编译码理论基础6
2.1Turbo码编码器6
2.1.1编码器的组成6
2.1.2交织器7
2.1.3分量编码器8
2.2Turbo码译码器9
2.2.1译码器的组成9
2.2.2MAP类算法9
2.2.3SOVA算法14
3Turbo码的仿真分析17
3.1不同分量码对性能的影响18
3.2不同帧长度对性能的影响19
3.3不同码率对性能的影响20
3.4不同译码算法对性能的影响21
3.5不同迭代次数对性能的影响22
4Turbo码关键模块的硬件实现24
4.1EDA技术与FPGA24
4.2编码器的实现24
4.2.1RSC编码器的硬件实现24
4.2.2交织器的硬件实现26
4.2.3延时器的硬件实现26
4.2.4串并转换复用器的硬件实现27
4.2.5编码器的整体硬件实现27
4.3译码器关键模块的实现29
4.3.1MAP类算法和SOVA算法的比较29
4.3.2欧式距离的计算器的硬件实现30
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