基于FPGA的低照度CMOS的图像处理与检测技术研究
本文首先阐述了运动目标检测的几种方法，低照度CMOS的研究意义及其研究现状，本文研究的背景和研究的内容。接着详细介绍了本课题所用到的软硬件平台，主要包括低照度CMOS摄像头，FPGA开发板，显示器，电源以及所用到的软件平台。最后在搭建好的的运动目标检测的硬件平台的基础上进行视频信号的AD和DA转化并且运用背景相减法进行目标检测。具体工作如下：首先，通过对图像格式进行分析，运用verilog编程并运用signaltap进行调试，并成功视频信号的接收和发送。接着，对SRAM的读写进行编程和调试，实现存储背景信息；最后，运用背景相减法，进行图像检测和处理。
关键词 运动目标检测 Quartus II 数模转换 模数转换 低照度CMOS 背景相减法
毕业设计说明书（毕业论文）外文摘要
Title Based on the FPGA low illumination CMOS image processing and detection technology research
Abstract
It is constantly increasing of image processing and detecting technology with the development of the time. The night moving targets detection based on FPGA technology is an important part of this technology and become research hot spot.And the moving target detection technology has been widely used in military, traffic, security monitoring,etc.Therefore, research on moving target detection invested a lot of manpower and material resources at home and abroad.This topic has designed a kind of low illumination CMOS motion target detection system based on FPGA.
First ,this article expounds the moving target detection and low illumination CMOS research significance and research status.Second then this topic by using the software and hardware platform is introduced, mainly including low illumination CMOS camera, the FPGA development board, display, power supply, etc.It achieves the goal of frame differential method detection method on the basis of the existing motion target detection.Finally, through the analysis of the moving object, and using verilog programming, realizing the collection of the signal, processing and output.the video acquisition based on FPGA, display and the goal of sports into the alarm function.
Keywords moving object detection Quartus II
digital-to-analogue conversion Frame Difference
analog-digital conversion low-light-level CMOS
目 次
1 绪论 1
1.1 运动目标检测的研究意义以及研究现状 1
1.2 低照度CMOS的研究意义及研究现状 1
1.2.1 国外低照度CMOS发展现状 2
1.2.2 国内低照度CMOS发展现状 3
1.2.3 低照度CMOS的发展条件及趋势 4
1.3 本课题的研究背景 5
1.4 本课题的工作内容 5
2 低照度CMOS图像处理软硬件平台 6
2.1 低照度CMOS图像处理硬件平台主要构成 6
2.1.1 FPGA开发板系统组成 6