基于DSP数字相机图像采集接口设计+FPGA连接图
本课题系统采用DSP+FPGA的架构，其中FPGA可看作是一个同步FIFO，配合DSP将相机采集到的数据传输给DSP。文章主要介绍DSP端的硬件设计和软件设计，包括仿真和调试也均基于DSP端的程序开发软件CCS3.3。
研究基于DSP芯片的EMIF接口，实现DSP和FPGA的无缝连接，使理论数据采集速度达到800MB/S，满足系统高速实时的要求。
关键词 图像采集 DSP EMIF
毕业论文设计说明书外文摘要
Title The design of digital camera image acquisition interface based on DSP
Abstract
With the development of the times, people on the quality of image and video is more and more high, so the speed of image data acquisition become more and more important. With the development of DSP chip in the hardware design, DSP has become the most suitable for digital signal processing chip. Therefore, we can use DSP to increase the speed of digital camera image acquisition greatly.
The system uses DSP+FPGA structure, FPGA can be regarded as a synchronous FIFO, FPGA is responsible for transmission of the image data that from the digital camera to the DSP. This paper mainly introduces the hardware design and software design of DSP, furthermore simulation and debugging are also based on DSP software-- CCS3.3.
Study on the EMIF interface of DSP chip to achieve the seamless connection between DSP and FPGA, the theoretical data acquisition speed can reach 800MB/S, which can meet the requirement of high speed and real time system.
Keywords Image acquisition DSP EMIF
目 次
1 绪论 1
1.1 课题背景 1
1.2 国内外研究现状 1
1.3 本课题所要研究的内容 1
2 数字相机图像采集及处理系统总体方案 3
2.1 系统总体方案选择 3
2.2 DSP芯片选型 3
2.3 FPGA与DSP接口选择 5
2.4 系统总体连接及工作原理 5
3 图像采集接口硬件设计 6
3.1 EMIF接口简介 6
3.2 C6455 EMIFA模块介绍 6
3.3 C6455 GPIO模块介绍 8
3.4 DSP与FPGA互连设计 10
4 图像采集软件设计 16
4.1 DSP软件的设计步骤 16
4.2 数据采集软件工作整体流程图 16
4.3 EMIF的初始化 16
4.4 外部中断GPIO初始化 18
4.5 EDMA初始化 19
4.6 数据采集中断服务程序 23
5 软件仿真与硬件调试 26
5.1 软件仿真 26
5.2 硬件仿真和调试 27
结 论 33
致 谢 34
参考文献 35
图1 FPGA端的连接1 36
图2 FPGA端的连接2 37
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