Title Design,optimization and simulation of 1.7kV SiC DMOS
Abstract
Silicon Carbide(SiC) is a typical material for the 3rd generation semiconductor. Owing to its wide band-gap, high electron saturation drift velocity, high critical breakdown field, high thermal conductivity, SiC has become an ideal material for high power devices. The SiC DMOS plays a promising and essential role in the field of high voltage power devices. In this paper a SiC DMOS with a Current Spreading Layer (CSL) structure has been discussed. Using the simulation tool Silvaco, the breakdown voltage and the on-resistance have been optimized and a 2350V,10.13mΩ•cm2 SiC DMOS has been achieved. Field Plate, Junction Termination Extension and Field Limiting Ring have been applied to the edge termination of the device to decrease the curve effect and increase the junction breakdown voltage up to 2050V, which is 90 percent of the breakdown voltage of the DMOS cell. The final compromise relationship between device structure parameters and device performance provide theoretical guidance and technical support for the development of high-voltage SiC devices.
Keyword SiC DMOS breakdown-voltage on-resistance Junction Termination Technology
目 次
1 绪论 1
1.1. 碳化硅功率半导体器件发展现状 1
1.1.1. 国外发展现状 1
1.1.2. 国内研究现状 2
1.2. SiC功率DMOS的研究意义 2
1.3. 研究内容 3
2 SiC DMOS器件基础 5
2.1. SiC 材料特性 5
2.2. 功率DMOS器件 6
2.2.1. DMOS器件结构介绍 6
2.2.2. VDMOS结构特点 8
2.2.3. 带CSL结构的VDMOS电学参数 9
2.3. SiC功率MOS的物理模型 14
2.3.1. 半导体器件基本方程 14
2.3.2. 禁带宽度变窄(BGN)模型 15
2.3.3. 碰撞电离模型 16
2.3.4. 迁移率模型 16
2.4. 仿真软件Silvaco简介 18
3 SiC DMOS器件优化仿真设计 19
3.1. 栅氧厚度对阈值电压Vth的影响 19
3.2. P-base浓度对导通电阻Ron和击穿电压BV的影响 20